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急...将计算机类英文翻译成中文
Rapid VLIW Processor Customization for Signal Processing Applications UsingCombinational Hardware Functions
This paper presents an architecture that combines VLIW (very long instructionword) processing with the capability to introduce application-specific customized instructions andhighly parallel combinational hardware functions for the acceleration of signal processingapplications. To support this architecture, a compilation and design automation flow is describedfor algorithms written in C. The key contributions of this paper are as follows: (1) a 4-way VLIWprocessor implemented in an FPGA, (2) large speedups through hardware functions, (3) ahardware/software interface with zero overhead, (4) a design methodology for implementing signalprocessing applications on this architecture, (5) tractable design automation techniques forextracting and synthesizing hardware functions. Several design tradeoffs for the architecture wereexamined including the number of VLIW functional units and register file size. The architecture wasimplemented on an Altera Stratix II FPGA. The Stratix II device was selected because it offers alarge number of high-speed DSP (digital signal processing) blocks that execute multiply-accumulateoperations. Using the MediaBench benchmark suite, we tested our methodology and architecture toaccelerate software. Our combined VLIW processor with hardware functions was compared to that ofsoftware executing on a RISC processor, specifically the soft core embedded NIOS II processor. Forsoftware kernels converted into hardware functions, we show a hardware performance multiplier of upto 230 times that of software with an average 63 times faster. For the entire application in whichonly a portion of the software is converted to hardware, the performance improvement is as much as30X times faster than the nonaccelerated application, with a 12X improvement on average.
Rapid VLIW Processor Customization for Signal Processing Applications UsingCombinational Hardware Functions
This paper presents an architecture that combines VLIW (very long instructionword) processing with the capability to introduce application-specific customized instructions andhighly parallel combinational hardware functions for the acceleration of signal processingapplications. To support this architecture, a compilation and design automation flow is describedfor algorithms written in C. The key contributions of this paper are as follows: (1) a 4-way VLIWprocessor implemented in an FPGA, (2) large speedups through hardware functions, (3) ahardware/software interface with zero overhead, (4) a design methodology for implementing signalprocessing applications on this architecture, (5) tractable design automation techniques forextracting and synthesizing hardware functions. Several design tradeoffs for the architecture wereexamined including the number of VLIW functional units and register file size. The architecture wasimplemented on an Altera Stratix II FPGA. The Stratix II device was selected because it offers alarge number of high-speed DSP (digital signal processing) blocks that execute multiply-accumulateoperations. Using the MediaBench benchmark suite, we tested our methodology and architecture toaccelerate software. Our combined VLIW processor with hardware functions was compared to that ofsoftware executing on a RISC processor, specifically the soft core embedded NIOS II processor. Forsoftware kernels converted into hardware functions, we show a hardware performance multiplier of upto 230 times that of software with an average 63 times faster. For the entire application in whichonly a portion of the software is converted to hardware, the performance improvement is as much as30X times faster than the nonaccelerated application, with a 12X improvement on average.
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